The subject matter disclosed herein relates to integrated circuit devices. More particularly, the subject matter relates to implanting semiconductor structures to form integrated circuit devices.
As integrated circuit (IC) technologies have advanced, the size of these devices has correspondingly decreased. In particular, as devices are reduced in scale to comply with ever-smaller packaging, tighter constraints are applied to their dimensions and spacings.
Lithography and implanting are commonly used techniques to form components in ICs, e.g., from semiconductor materials. Implanting has been especially beneficial as IC technologies have reduced in scale, however, due to that reduction in scale, it is difficult to accurately implant deep into semiconductor structures. In particular, the high aspect ratio required for lithographical implanting at desired device depths can limit the accuracy of the implant, which limits the ability to scale formation of a semiconductor device using this technique.